1) Field of the Invention
The present invention relates to a microcomputer configured to facilitate a test on an interrupt request signal and a direct memory access (DMA) request signal issued from peripheral inputs/outputs (I/Os) built in the microcomputer.
2) Description of the Related Art
In a conventional microcomputer, peripheral I/Os such as a timer and an analog-to-digital (A/D) converter, an interrupt controller, a central processing unit (CPU), and the like are integrated on one chip, and a test on an interrupt request signal from the peripheral I/Os is conducted in the following manner.
That is, according to a conventional method of conducting a test on interrupt request signals, performed in a microcomputer, the test is conducted on an interrupt function of the CPU based on an interrupt request signal by giving conditions that allow an interrupt request to be generated in each of the peripheral I/Os, to the peripheral I/O, and actually operating the peripheral I/O to output the interrupt request signal from the peripheral I/O to the interrupt controller.
When inter-wiring short-circuiting between the interrupt request signals is to be detected, one peripheral I/O is allowed to actually generate an interrupt request signal, and it is confirmed that an interrupt request signal is not generated in any other peripheral I/O.
At the time of conducing a test for checking whether generation of the interrupt request signal in each peripheral I/O and the interrupt request confirmation signal from the CPU occur at the same timing, an appropriate test pattern is provided to each peripheral I/O to monitor the internal signal by simulation or the like.
In such a conventional technique, an appropriate test pattern is provided to create a situation for generating an interrupt request signal by the peripheral I/O, and the interrupt request signal is actually generated by each peripheral I/O, to carry out a test on inter-wiring short-circuiting between the interrupt request signals and the interrupt function such as simultaneous generation of interrupt request signals from a plurality of peripheral I/Os. Therefore, it is necessary to perform troublesome operation such as creating a test pattern, and there is a problem that the interrupt function test cannot be carried out efficiently.